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Astera Labs' Leo CXL memory controller securing new design wins for KV cache offload in AI inference; expects shipments in 2027 with 'additional new hyperscaler' customer
Jitendra Mohan· Astera Labs· AI· 2026-05-05· about Astera Labs (ASTRA)
“We are happy to report that we have won a new design leveraging a customized version of our Leo CXL controller to maximize performance within these AI use cases... with an additional new hyperscaler, on at‑scale performance tests and expect that one to ship revenue in 2027.”
Why it matters
KV cache is becoming a critical bottleneck in AI inference workloads; Astera Labs' custom CXL controller is being adopted as a solution, signaling that memory subsystem optimization is now a priority for hyperscalers.
Investment implication
Emerging picks-and-shovels opportunity: companies enabling memory pooling, caching, and acceleration for inference workloads are gaining TAM as inference workload mix increases relative to training.